1. Field of the Invention
The present invention relates to telecommunications circuitry, and, in particular, to echo cancellation filters for interface units that interconnect analog and digital components, such as analog front-end circuits for modems.
2. Description of the Related Art
FIG. 1 shows a simplified block diagram of a conventional asymmetric digital subscriber line (ADSL) modem 100 that converts an existing twisted-pair telephone loop into an access path for multimedia and high-speed data communications in addition to analog voice signals. As shown in FIG. 1, ADSL modem 100 comprises a digital unit 102 (e.g., a digital signal processor (DSP)) configured to an analog front-end (AFE) circuit 104, which is in turn configured to a line interface unit 106. Digital unit 102 provides a digital transmit (TX) signal to AFE circuit 104, which converts the digital TX signal into an analog TX signal. AFE circuit 104 provides the analog TX signal to the line interface unit 106, which transmits the analog TX signal over the loop, while providing high-voltage, high-current electrical isolation between the loop and the terminal side of ADSL modem 100. At the same time, line interface unit 106 receives an analog signal from the loop and provides an analog receive (RX) signal to AFE circuit 104, which converts the analog RX signal into a digital RX signal, which is then presented to digital unit 102.
FIG. 2 shows a block diagram of AFE circuit 104 of FIG. 1. As shown in FIG. 2, AFE circuit 104 has two parallel processing paths: a transmit path for the digital TX signal received from digital unit 102 and a receive path for the analog RX signal received from line interface unit 106. The transmit path comprises:
TX digital shaping filter 202, which digitally shapes the digital TX signal according to a specified shaping function;
TX digital-to-analog converter (DAC) 206, which converts the digital TX signal from shaping filter 202 into an analog TX signal;
TX analog low-pass filter (LPF) 208, which filters out high-frequency components from the analog TX signal from DAC 206; and
TX programmable gain amplifier (PGA) 210, which amplifies the analog TX signal from LPF 208 to generate the analog TX signal that is presented to line interface unit 106.
Analogously, the receive path comprises:
RX PGA 212, which amplifies the analog RX signal received from line interface unit 106;
RX analog LPF 214, which filters out high-frequency components from the analog RX signal from PGA 212; and
RX analog-to-digital converter (ADC) 216, which converts the analog RX signal from LPF 214 into a digital RX signal; and
RX digital filter 222, which digitally filters the digital RX signal from ADC 216 to generate the digital RX signal that is presented to digital unit 102.
For an xDSL modem, such as ADSL modem 100 of FIG. 1, the TX and RX signals are present on the telephone loop simultaneously with the transmitting and receiving operations being conducted at the same time. The standard technique for separating the signals for the TX and RX paths is based on impedance matching. If the terminating impedance of the line interface unit were exactly equal to the equivalent loop impedance, then the transmit and receive signals would be processed completely independently of one another by the TX and RX paths, respectively. However, since the equivalent loop impedance can vary significantly from one loop to another, no matter how the terminal impedance is designed in the line interface unit, a perfect match will not be achieved for all applications. As a result, there may be significant leakage of the transmit signal into the receive path, also known as echo, which can adversely affect the quality of the receive signal.
One way to address the problem of echo in the RX signal is to implement adaptive echo cancellation (EC) in the digital domain (e.g., implemented within digital unit 102). In that case, AFE circuit 104 does not have to get involved in the EC process. However, in applications with very long loops (e.g., about 10% of all loops), the ADC in the RX path of AFE circuit 104 cannot provide sufficient dynamic range to handle both a strong echo and a weak signal to allow the echo to be sufficiently canceled in the digital domain (i.e., after digitization). In that case, echo cancellation in the analog domain is needed to achieve better performance. With analog-domain EC, the echo is canceled before the ADC in the RX path. As a result, the RX ADC""s dynamic range is no longer a performance-limiting factor.
The present invention is directed to a scheme for training circuitry that performs echo cancellation (EC) in the analog domain, for example, for the AFE circuit of an ADSL modem. The present invention is based on AFE circuitry having an echo cancellation (EC) path in addition to the transmit (TX) and receive (RX) paths, where the EC path comprises an estimation filter that estimates, from the TX signal, the echo that will appear in the RX signal. According to certain embodiments of the present invention, the coefficients for the estimation filter are determined as a result of a two-step training algorithm. In the first step, pseudo white gaussian noise is applied to the EC path with the TX path turned off. In the second step, the same pseudo white gaussian noise is applied to the TX path with the EC path turned off. The different RX signals recorded during the two steps are then mathematically manipulated to determine the coefficients for the estimation filter in the EC path. After training is complete, the coefficients for the estimation filter are preferably held fixed during processing of real transmit and receive signals.
In one embodiment, the present invention is, in a circuit comprising (1) a transmit (TX) path configured to convert a digital TX signal into an analog TX signal; (2) a receive (RX) path configured to convert an analog RX signal into a digital RX signal; and (3) an echo cancellation (EC) path configured to generate an analog EC signal, based on the digital TX signal, to be subtracted from the analog RX signal prior to digitization, a method for training an EC estimation filter in the EC path, comprising the steps of (a) generating a first digital RX signal by applying a first digital TX signal to the circuit with the TX path turned off; (b) generating a second digital RX signal by applying a second digital TX signal to the circuit with the EC path turned off; and (c) generating coefficients for the EC estimation filter based on the first and second digital RX signals.